Students and freshers can apply for the Formal Verification Internship at Synopsys, Bangalore. Check the eligibility and other details below!
Synopsys technology is at the heart of innovations changing how we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure.
As a Formal Verification Engineer at Synopsys, the individual will be responsible for formally verifying complex design IPs. The Synopsys IP Group follows a robust formal verification methodology that allows hardware verification engineers to effectively apply formal verification (FV) tools and techniques to intricate and/or critical RTL logic. The role will involve close collaboration with designers, architects, verification engineers, and the Synopsys Tool Development Group to drive verification projects forward.
Interested candidates can directly apply through this link.
Bengaluru, Karnataka, India
