Fellowships

QIF 2024: Qualcomm Innovation Fellowship 2024 [Institute Rewards Upto Rs. 10 Lakhs; IITs]: Apply April 15

Apoorva

Mar 28, 2024
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Applications are invited for the Qualcomm Innovation Fellowship 2024 from UG and PG in the EE and CSE department-listed institutes. Check the details below!

About Qualcomm

Qualcomm is enabling a world where everyone and everything can be intelligently connected. You interact with products and technologies made possible by Qualcomm every day, including 5G-enabled smartphones that double as pro-level cameras and gaming devices, smarter vehicles and cities, and the technology behind the smart, connected factories that manufacture your latest purchase. Our powerful connectivity solutions keep you connected—even in remote areas.

About QIF 2024

Qualcomm Technologies, Inc. proudly announces the launch of the Qualcomm Innovation Fellowship 2024-2025 program for selected Indian universities. Each winning team (up to 2 students and 1 faculty member) will receive a financial award for the academic year 2024-25, plus the assignment of a Qualcomm researcher(s) as a mentor to facilitate close interaction with Qualcomm.

The Program is sponsored by Qualcomm Technologies, Inc., headquartered at 5775 Morehouse Drive, San Diego, CA 92121, U.S.A. (“Sponsor”).

Fellowship Details

Submissions will be open from Feb 26, 2024. The template is provided on this website for proposal submission by the teams.

The team can be comprised of up to 2 students, wherein at least one student member of the team has to be enrolled as a Master (M.S. / M.Tech.), Dual degree (B.Tech. + M.Tech/M.S.) or PhD student in the Electrical Engineering or Computer Science department (or related department) for the entire 2024-25 academic year. In the case of a dual degree, the student should have completed his/her bachelor’s degree requirements by the end of the 2023-2024 academic year.

A second student team member is optional and may even be a final year undergraduate, i.e., enrolled in the final year of the undergraduate program in 2024-2025. Each student on a team is an “Entrant” and needs to be enrolled as a full-time student in one of the participating institutes.

Also, each team must have one or more faculty advisors supporting the proposal and all the team members and the faculty advisor(s) should be from the same institute. The Master or PhD entrants from each team may choose ideas from their ongoing or planned research and/or thesis projects per their university policies.

Each team shall submit an innovation proposal (download the template) that must include the following:

Three-page innovation proposal (plus optional page for bibliography/references)
- Introduction and problem definition
- Innovation proposal and relation to the state-of-the-art
- The one-year horizon of the project, even if the proposal is a multi-year project
Letter from one or more faculty members recommending the innovation, including:
- Why the proposal is innovative
- Why the proposal is important
- Why the current team is likely to succeed in their proposal
Each student’s Curriculum Vitae
The team members signed the agreement form (acknowledging the official rules of the Qualcomm Innovation Fellowship program in India). Download the official rules and sign at the marked location in the rules document, thus agreeing to the competition rules.
The student signed and completed the FCPA (Foreign Corrupt Practices Act) form. (download the Student-FCPA) form
Note: If selected as a finalist, you will be required to provide a completed FCPA (Foreign Corrupt Practices Act) form, which must be filled and signed by any authorized person in the institute who does not have a financial interest in the Fellowship Program.
Failure to provide this form by the due date will result in disqualification. The same form can be utilized for multiple teams if represented by the same faculty. Download the Institute-FCPA form or complete it online here.

Eligibility FAQs

Can students without advisors participate?
- No, The students must find a faculty advisor/sponsor to recommend the innovation.
- The faculty recommendations are an important factor in the judging process.

Are newly admitted students eligible to apply for the fellowship?
- Yes. Students who begin a Masters (M.S. / M.Tech.) or Ph.D. program in the Fall semester of a
  Fellowship academic year are eligible to apply for a fellowship for that academic year.
- For example, a student entering a PhD program in the Fall 2024 semester may apply for a fellowship for the 2024-2025 academic year referred to as “QIF India 2024.”
- The advisor’s recommendation should mention that the student has been admitted for the upcoming Fall semester.
- The second student member in the team, if enrolled in an undergraduate program, must be entering his/her final year for the 2024-25 academic year.
- The advisor’s recommendation should mention that the student will graduate from his or her program at the conclusion of the 2024-2025 academic year.
When do I have to be enrolled to be eligible to apply?
- You do not have to be enrolled at the time that you apply for a Fellowship, but winners must be
  enrolled for the entire QIF 2024 Fellowship academic year. In a team of two, this rule applies to both students.
I am graduating soon, am I still eligible?
- Students are eligible if they are enrolled for the entire QIF 2024 Fellowship academic year.
- Therefore, students who intend to graduate prior to the conclusion of the QIF 2024 Fellowship
  academic year are not eligible.
Can previous QIF applicants apply again?
- Of course! Qualcomm encourages former applicants to submit new proposals or update and resubmit them using the current proposal guidelines.

Click here to view more FAQs.

Selection Process

Idea selection for presentation: Applications must be submitted online by the specified deadline (see Timeline tab). All proposals will be reviewed internally by a team of Qualcomm researchers. A subset of teams will be selected as Program Finalists and notified according to the timelines mentioned in the Timelines tab of this website. Selected (“finalist”) teams will be invited to make a virtual presentation of the research proposal described in their Application to a judging panel.
Final proposals selection: Each selected (“finalist”) team must prepare a presentation for the judges.
The format of the finalist presentation will be provided at a later date. The presentation generally includes
- The proposal idea
- The differentiating factors from state of the art
- The execution plan/strength of the team
  At least eight winning teams will be chosen from this pool of selected teams after they present to the judging panel.

At least eight winning teams will be chosen from this pool of selected teams after they present to the judging panel. The winning teams will be invited by the Sponsor to a virtual event for presenting the proposal details. All QIF-related information will be announced on this webpage. Please check back regularly for updates.

Faculty & Mentor

In addition to the faculty advisor(s) guiding the fellowship research, Qualcomm Technologies, Inc. will help with assigning mentor(s) to facilitate periodic interaction opportunities with Qualcomm Research.

Funding Renewal Opportunity

The QIF India 2024 winning proposals will be re-evaluated in Apr/May 2025 in the form of a project presentation, with up to one team being granted a funding renewal from Qualcomm Technologies, Inc.

Participating Universities

Qualcomm Technologies, Inc. is inviting applications for the Qualcomm Innovation Fellowship India 2024 from undergraduate and postgraduate students in the Electrical Engineering and Computer Science (and related) departments at:

Indian Institute of Science, Bangalore
Indian Institute of Technology, BHU
Indian Institute of Technology, Bombay
Indian Institute of Technology, Delhi
Indian Institute of Technology, Guwahati
Indian Institute of Technology, Kanpur
Indian Institute of Technology, Kharagpur
Indian Institute of Technology, Madras
Indian Institute of Technology, Roorkee
Indian Institute of Technology, Hyderabad
International Institute of Information Technology, Hyderabad
Indraprastha Institute of Information Technology, Delhi
Indian Statistical Institute, Kolkata
Indian Institute of Technology, Indore
Indian Institute of Technology, Gandhinagar
Indian Institute of Technology, Jodhpur

Area of Interest

Advanced Semiconductor Electronics

Ultra-low (uW) power embedded platform for edge computing (ULP architectures and designs, HW accelerators, power generation and management, novel memories, security)
RF / analog ASICs and architectures (Sub-6GHz 5G power amplifiers, mmWave RFIC and Data Converters for 5G NR, adaptive RF signal processing algorithms, etc.)
Advanced antenna (mmWave and phase-array antennas), novel antenna materials, structures and implementations
Power Management ASICs (wide bandwidth SMPS, wide bandwidth envelope tracker, embedded regulation)
PA linearization techniques for high efficiency PAs
ASIC implementation methodology development for improved Performance, Power, Area, Yield. On-die power grid analysis and optimization, dynamic and static power optimizations, silicon-driven static timing analysis, design optimization for yield improvement
Low-power high-speed Data Converters
Low-power high-bandwidth SERDES for die to die and chip to chip communication
Low-power high-bandwidth memory interface (DRAM and FLASH) circuits
Ultra-low power ML HW design using mixed-signal techniques (such as Compute-In-Memory and analog neural network)
Mixed-signal Analog and RF HW design using ML techniques
Digital wireless transceivers
Transceivers for ultra-low power applications with discrete analog signal processing
Hardware security
Electronic Design Automation (EDA) algorithms
New paradigms of digital design
Circuit design techniques towards better performance
Yield enhancement strategies
Design for test
Design for debug
Network on chip

Advances in Communication Techniques and Theory

Reliable low latency communications for licensed/unlicensed in mid band and mmW spectrum
Machine learning designs for wireless communications systems and algorithms
Joint communication and sensing/positioning techniques for licensed and unlicensed spectrum
Vehicle-vehicle, vehicle to infrastructure, and vehicle-pedestrian communications design
Cooperative sensing and communication for radar and other sensors
Enhanced ultra wideband and associated ranging techniques (UWB, 802.15.4z/ab, 802.15.14)
Network topologies using OAM, LOS MIMO, Intelligent surfaces, etc.
Low energy networks (Wi-Fi, Bluetooth LE, 802.15.4, Zigbee, etc.)
Low-power signal-processing algorithms for mmW massive-MIMO communication systems
Advanced low power HW/FW/SW modem implementation approaches
New signal-processing techniques and use-cases using RF sensing (wireless channel capture)
Iterative detection and decoding algorithms
Non coherent communication for low power IoT
Communication systems design in THz bands
Security topics including physical layer security, privacy and resilience
Use of algorithms in the cloud to manage, control and actuate wireless networks
Network Architecture Evolution (O-RAN) for 6G
Gigantic MIMO for 6G
Intelligent Connected Edge (Split Compute Workload) for 6G
Advanced Antenna/RF Design (Ku band) for 6G
Advanced Coding/Modulation Techniques for 6G

Autonomous Driving

Advanced sensors and sensor fusion
Imaging radar
Computer vision for autonomy
Sensor fusion with deep learning
Behavior planning with uncertainty
3D Maps and Localization
Lidars and Lidar data processing
Functional Safety and Freedom from Interference
Cybersecurity for Autonomous Vehicles
Data Analytics for Autonomous Driving
Augmented Heads-up Displays
Driver Assistance in Indian Road conditions

Machine Learning

Traditional Natural language processing
Large Language Models and Transformer based Architectural Designs for varied domains.
Deep learning-based Diffusion Models
Multimodal Generative Models
Computer vision
Reinforcement and Continual learning
AI for intent alignment(RLHF)
ML for Combinatorial Optimization
On-device training and model personalization
Transfer learning and Knowledge distillation
Novel compute architectures for ML tasks, e.g., in-memory compute, analog compute
Traditional Unsupervised Learning
Bayesian deep learning and uncertainty estimation
Federated learning
Self-Supervised Learning
Causality and Interactive Learning
Geometric Deep Learning and Graph Neural Networks
Quantum Machine Learning
Energy Based ML Models
Machine Unlearning

Machine Learning Compilers

Improvements in Code generation (Automatic code generation for various ML operators for a given backend is desired)
Intermediate representation for machine learning workloads/compilers
Efficient data layouts for machine learning workloads
Compilers for machine learning Inference and training
Compilers for high performance compute architectures

Multimedia Computing

Real Time 3D perception, mapping, reconstruction, scene understanding and geometry interpretation
Real time 3D graphics rendering
Eye-tracking devices and algorithms
Hand skeleton and multimodal human body pose estimation and tracking
Low power/complexity rendering systems
Lighting/illumination modelling
Multi-focal, near eye displays
High efficiency video coding techniques
Deep learning based image and video compression (intra and inter prediction, in-loop filters, transforms, entropy coding)
Deep learning based optimized video encoding
Perceptually optimized video coding
Machine Learning based rendering techniques
“Visual Quality Assessment: Image, Video, XR”
6DoF video compression, Point Cloud compression
Error-robust speech coding, voice conversion, speech synthesis, non-acoustic speech capture or estimation
Deep learning-based speech quality assessment
Dynamic avatar reconstruction using Audio
Deep learning-based image/video restoration
Multimodal image analysis – visible light, IR, TOF
Optics – computational photography co-design
Deep Learning based optical flow and disparity (estimation, temporal/edge consistency, pre-processing, post processing, fusion)
Deep Learning based keypoint estimation and matching

SoC / Processor Architecture and Design

Novel processor & SoC architectures, microarchitectures, processing in memory and techniques & circuits for high-performance, energy-efficient, and reliable computing
Novel architectures for applications including artificial intelligence, edge training, inference, IoT, XR, mobile, automotive, gaming, server & compute
Architectural support for novel programming models of heterogeneous SoCs
Architecture and logical partitioning of SoCs for multi-die or chiplets (2D, 2.5D, or 3D) based implementation
EDA for SoC design and application of Machine learning techniques for VLSI HW design
Novel ML-accelerator core micro-architecture design (e.g. convolution, depth-wise convolution and conditional compute)
Novel Compute-in-Memory (CiM) micro-architecture for ML operators

Secure System Design

Secure Design: Isolation technologies: Virtualization, enclaves, and software sandboxing, with a focus on heterogeneous systems on chip
Secure Design: Methods for secure implementation of post-quantum cryptography and tools to detect issues in those implementations
Secure Design: Machine learning model security against adversarial attacks
Vulnerability Detection: Automated analysis and verification of communication protocols in standards and in implementations
Vulnerability detection: New tools and techniques for finding exploitable vulnerabilities in Software with a focus on embedded systems
Vulnerability detection: New tools and techniques for finding exploitable vulnerabilities in Hardware with a focus on embedded systems
Vulnerability detection: Software-based exploitation of hardware vulnerabilities, such as micro-architectural, side-channels and glitch attacks, and proper countermeasures

Semiconductor / Process Engineering: Packaging, Test, Quality and Yield Learning

CMOS package integration (thermal-aware designs or circuits, advanced packaging techniques, antenna-in-package etc.)
5G test techniques for mmWave and sub6 devices and system
Defect-oriented testing and fault modeling in deep sub-micron process nodes
Applications of Data Analytics, Machine Learning and AI in Test
Test Challenges for 2.5D/3D Systems in Packages